1. Field of the Invention
This invention relates to the field of computer graphics systems. More particularly, this invention relates to a floating-point processor for a high performance three dimensional graphics accelerator in a computer system.
2. Art Background
A three dimensional graphics accelerator is a specialized graphics rendering subsystem for a computer system. Typically, an application program executing on a host processor of the computer system generates three dimensional geometry input data that defines three dimensional graphics elements for display on a display device. The application program transfers the geometry input data from the host processor to the graphics accelerator. Thereafter, the graphics accelerator renders the corresponding graphics elements on the display device.
In prior graphics accelerators, the three dimensional graphics functions of transformation, clip test, face determination, lighting, clipping, and screen space conversion are often performed by commercially available digital signal processing (DSP) chips. However, such DSP chips are not optimized for three dimensional computer graphics.
For example, the fast access internal registers provided in a typical DSP chip are too few in number to accommodate the inner loops of most three dimensional graphics processing algorithms. As a consequence, on-chip data caches are employed to compensate for the limited number of internal registers. Moreover, DSP chips require an assortment of support chips to function in a multiprocessing environment. Unfortunately, the addition of the support chips increases printed circuit board area for the graphics accelerator, increases system power consumption, increases heat generation, and increases system cost.
As another example, three dimensional graphics functions often require sorting of three dimensional vertices according some criteria. A graphics accelerator employing DSP chips performs such sorting by physically transferring vertex data between internal registers or data cache locations. Unfortunately, the physical transfer of the vertex data is time consuming and causes a decrease in system performance.
As a further example, the DSP chip in prior systems typically must perform input/output tasks for accessing geometry input parameters and delivering transformed results. The DSP chip performs the input/output tasks in addition to the graphics function tasks. Unfortunately, the time spent by the DSP chip on the parameter input/output tasks is taken away from the graphics function tasks, thereby decreasing graphics processing performance.
As will be described, the present invention is a floating-point processor for a high performance three dimensional graphics accelerator in a computer system that provides specialized graphics micro instructions and hardware features for improving graphics accelerator performance while minimizing graphics accelerator costs.